The Performance Engineer's Guide to Modern Computer Architecture

Understanding, Analyzing, Measuring and Optimizing Computing Systems

Introduction: Why Architecture Matters

Chapter 1: The Architecture of Performance

1. The Emergence of Performance
2. Why Architecture Matters for Software Engineers
3. The Performance Engineering Mindset
4. A Working Example: Tracing a Slow Query Through the Stack
5. The Cost Model of Computing
6. How to Use This Book

Chapter 2: Historical Foundations of Computer Architecture

1. From Vacuum Tubes to Integrated Circuits
2. The Von Neumann Architecture and Its Variants
3. The Rise of the Microprocessor: Intel 4004 to 8086
4. The RISC Revolution
5. The Superscalar Era
6. The Multicore Transition
7. Architectural Continuity and Change

Chapter 3: Binary Representation and Digital Logic

1. Bits, Words and Number Representations
2. Boolean Algebra and Logic Gates
3. Combinational and Sequential Logic
4. Flip-Flops, Registers and State Machines
5. Timing, Clock Domains and Setup/Hold Constraints
6. CMOS Technology and Switching Costs
7. The Clock: The Heartbeat of Synchronous Design

Chapter 4: Instruction Set Architectures

1. What Is an Instruction Set Architecture
2. CISC and RISC: Philosophy and Reality
3. The x86-64 Architecture
4. The ARM Architecture Family
5. The RISC-V Instruction Set
6. ISAs in Practice: Performance Implications
7. Choosing an Architecture for Your Workload

Chapter 5: The CPU Microarchitecture

1. The Instruction Pipeline
2. Superscalar Execution and Execution Ports
3. Micro-Operations and Translation
4. Register Renaming and Physical Registers
5. Out-of-Order Execution
6. The Reorder Buffer and Commit Logic
7. Execution Efficiency and IPC Limits

Chapter 6: Speculation and Branch Prediction

1. The Cost of Conditional Branches
2. Static and Dynamic Branch Prediction
3. Branch Target Buffers and Return Stack Buffers
4. Speculative Execution and Its Risks
5. Security Implications: Spectre, Meltdown and Mitigations
6. Branch Optimization in Software
7. Measuring Branch Behavior

Chapter 7: Instruction Scheduling and Parallelism

1. Data Dependencies and True Hazards
2. Anti-Dependencies and Output Dependencies
3. Tomasulo’s Algorithm
4. Reservation Stations and Load/Store Queues
5. Compiler Scheduling and Software Pipelining
6. Exposing Instruction-Level Parallelism
7. When ILP Runs Out

Chapter 8: Cache Hierarchies

1. The Locality Principle
2. Cache Organization: Sets, Ways, Lines
3. Hit, Miss and the Miss Penalty
4. Replacement Policies
5. Write Policies and Cache Coherence Basics
6. Cache Thrashing and Conflict Misses
7. Prefetching Mechanisms

Chapter 9: Cache Optimization for Software

1. Analyzing Cache Behavior
2. Data-Oriented Design
3. Memory Layout and Structure of Arrays vs Array of Structures
4. Padding, Alignment and False Sharing
5. Loop Transformations for Cache Efficiency
6. Practical Cache Optimization Case Studies
7. Measuring Cache Performance

Chapter 10: The Memory Subsystem

1. DRAM Technology and Organization
2. Memory Controllers and Channels
3. Bandwidth, Latency and Access Timing
4. Virtual Memory and Address Translation
5. Page Tables and Translation Lookaside Buffers
6. Huge Pages and Performance
7. NUMA Architecture and Programming
8. Memory Allocation Patterns

Chapter 11: System Interconnects and I/O Architecture

1. Buses and Point-to-Point Interconnects
2. PCIe Architecture and Generations
3. CXL and Coherent Accelerators
4. Chiplets and Advanced Packaging
5. System-on-Chip Architectures
6. The Memory-Mapped I/O Paradigm
7. I/O Bottlenecks and Architectural Responses

Chapter 12: SIMD and Vector Processing

1. The SIMD Model
2. x86 SIMD Evolution: SSE, AVX, AVX-512
3. ARM NEON and SVE/SVE2
4. Vectorization: Automatic and Manual
5. Data Alignment and Vector Masks
6. Vectorization Performance Case Studies
7. When Vectorization Helps or Hurts

Chapter 13: GPUs and Parallel Processing Architectures

1. The GPU Execution Model
2. SIMT Architecture and Warp Scheduling
3. GPU Memory Hierarchies
4. Occupancy and Performance
5. CPU vs GPU: Choosing the Right Accelerator
6. Programming for GPUs: Data Movement and Kernels
7. Practical GPU Optimization

Chapter 14: Specialized Accelerators and Domain-Specific Architectures

1. Why Specialized Hardware
2. Tensor Processing Units and AI Accelerators
3. Neural Processing Units
4. FPGAs for Custom Computing
5. Domain-Specific Architectures
6. The Economics of Custom Silicon
7. Accelerators in the Data Center

Chapter 15: Concurrency and Multicore Design

1. Hardware Multithreading: SMT and HPC
2. Memory Consistency Models
3. Atomic Operations and Hardware Support
4. Cache Coherence Protocols
5. Synchronization Primitives and Their Costs
6. Lock-Free and Wait-Free Algorithms
7. False Sharing and Data Contention

Chapter 16: Parallel Programming and Scalability

1. Amdahl’s Law and Its Implications
2. Gustafson’s Law and Scalability
3. Thread-Level Parallelism
4. Work Partitioning Strategies
5. Communication and Synchronization Overheads
6. Measuring and Diagnosing Parallel Performance
7. Scaling to Many Cores

Chapter 17: Storage and Persistent Memory

1. NAND Flash and SSD Architecture
2. SSD Internal Mechanics: GC, Wear Leveling, Endurance
3. NVMe Protocol and Queue Architecture
4. Storage Latency and Throughput Characteristics
5. Persistent Memory Technologies
6. I/O Optimization in Software
7. Storage Tiering and Hybrid Architectures

Chapter 18: Power, Thermal Design and Performance-per-Watt

1. Dynamic and Static Power in CMOS
2. DVFS and Frequency Scaling
3. Turbo Boost Technologies
4. Thermal Design and Throttling
5. Energy-Proportional Computing
6. Optimizing for Performance-per-Watt
7. Power Management in Software

Chapter 19: Performance Measurement and Analysis

1. The Performance Engineering Methodology
2. Latency, Throughput and Their Tradeoffs
3. Establishing Baselines and Targets
4. Designing Meaningful Benchmarks
5. Linux perf and Performance Counters
6. Intel VTune and AMD uProf
7. PAPI, PCM and eBPF
8. Flame Graphs and Visualization
9. Interpreting Hardware Performance Counters

Chapter 20: Advanced Performance Analysis

1. Sampling vs Tracing vs Instrumentation
2. Microbenchmarking Frameworks
3. Statistical Rigor in Performance Measurement
4. Avoiding Measurement Pitfalls
5. Compiler Optimization Reports and Assembly Analysis
6. Memory Access Pattern Analysis
7. System-Wide Profiling
8. Case Study: Full-Stack Performance Investigation

Chapter 21: Optimization Techniques and Transformations

1. The Optimization Hierarchy: Where to Look First
2. Algorithmic and Complexity Improvements
3. Data Structure and Layout Optimizations
4. Loop Transformations and Tiling
5. Prefetching and Data Movement
6. Branch Optimization
7. Inlining, Unrolling and Code Motion
8. Compiler Flags and Optimization Levels
9. Case Studies: Real Optimization Journeys

Chapter 22: Modern Architectural Trends

1. Advanced Packaging: 2.5D, 3D Stacking, Interposers
2. High-Bandwidth Memory and Stackable DRAM
3. Chiplet-Based System Design
4. Confidential Computing and Trusted Execution Environments
5. Hardware Virtualization Extensions
6. Cloud and Hyperscale Architectures
7. Exascale and Post-Exascale Computing
8. Sustainable and Carbon-Aware Computing

Chapter 23: Synthesis and Practice

1. Building a Mental Model of the Machine
2. The Performance Engineer’s Decision Process
3. Architecture and Software Co-Design
4. When to Optimize and When to Accept
5. Staying Current in a Fast-Moving Field
6. Final Thoughts on Performance and Architecture

Conclusion

References