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AArch64 (ARM64) Assembly Programming

From Fundamentals to Advanced Systems Programming

This book is 100% completeLast updated on 2026-07-15

Master AArch64 assembly with a practical guide that covers ARM64 fundamentals, advanced instruction sets, performance optimization, debugging, and systems programming. From your first instructions to writing efficient low-level code, this book provides the knowledge and hands-on examples you need.

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About

About

About the Book

A comprehensive guide to ARM64 architecture, instruction sets, and low-level development. This book takes you from the basics of the AArch64 register file and instruction encoding through the full breadth of the instruction set, including SIMD/NEON vector programming, cryptographic extensions, and SVE scalable vectors. You will learn calling conventions and the AAPCS64 ABI, memory management and cache hierarchy, synchronization primitives for concurrent programming, performance tuning techniques, compiler interactions with inline assembly, debugging and reverse engineering workflows, and practical systems programming on ARM64 platforms. Whether you are optimizing hot paths, writing kernel code, or exploring the architecture for the first time, this book provides the depth and practical examples you need.

Author

About the Author

Steve Publications

Steve is a technology professional with more than 20 years of experience in software development, server infrastructure, cybersecurity, vulnerability research and reverse engineering. Throughout his career, he has designed, secured, analyzed and tested complex software and infrastructure, with a particular focus on understanding how systems fail and how they can be made more secure.

Outside of work, Steve enjoys sharing knowledge with the technology community. He collaborates with researchers, industry experts and technology professionals to write practical books covering software development, cybersecurity, cloud computing, networking, DevOps, artificial intelligence and enterprise technologies. His books focus on practical learning through clear explanations, real-world examples and hands-on exercises. With more than two decades of industry experience, his goal is to help IT professionals, students and technology enthusiasts build useful skills and stay current in a rapidly changing industry.

We believe readers deserve to know how our books are created. Most of our authors are not native English speakers, so we use AI to help translate, proofread manuscripts, fix grammar, improve sentence structure and make technical explanations easier to read. AI is used as an editing tool only. It does not replace the research, technical knowledge or hands-on experience behind our books. Some of our authors also prefer to remain anonymous for privacy or professional reasons. In those cases, we publish their work under a different name. The author's name may be different, but the quality of the content and our review process remain the same.

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Contents

Table of Contents

From Fundamentals to Advanced Systems Programming

Introduction: The ARM Revolution and Why AArch64 Matters

  1. From Acorn to Apple Silicon: The ARM Story
  2. Why Learn Assembly in 2026?
  3. What This Book Covers and How to Use It

Chapter 1: Architecture Fundamentals

  1. The Register File: Thirty-One General-Purpose Registers
  2. Execution States and Modes: AArch64 vs AArch32
  3. Instruction Encoding and Formats
  4. Endianness and Byte Ordering
  5. Comparison with x86-64 Architecture Design

Chapter 2: Addressing Modes and Data Access

  1. The Load/Store Architecture
  2. Immediate Offsets and Pre-/Post-Indexed Addressing
  3. Register-Offset and Shifted Addressing
  4. Unaligned Access and Endianness Effects
  5. The AArch64 Memory Model: Weak Ordering Explained

Chapter 3: Integer Operations and the ALU

  1. Data Processing: Immediate Instructions
  2. Arithmetic: ADD, SUB, and Their Variants
  3. Multiplication and Division
  4. Logical Operations: AND, ORR, EOR, BIC
  5. Shifts, Rotates, and Bit Manipulation
  6. Comparison and Set Operations

Chapter 4: Control Flow and Branching

  1. Unconditional and Conditional Branches
  2. The Condition Flag System: CZFO vs x86 Flags
  3. Compare and Branch (CBZ/CBNZ)
  4. Loop Patterns and Idiom Recognition
  5. Branch Prediction and Speculative Execution
  6. Tail Call Optimization and Return Sequences

Chapter 5: Floating-Point and SIMD/NEON

  1. The FP/SIMD Register File: V0 to V31
  2. Scalar Floating-Point Operations
  3. NEON Vector Data Types and Layouts
  4. Vector Arithmetic and Reduction Patterns
  5. Data Conversion and Type Casting
  6. Real-World SIMD Optimization Case Study

Chapter 6: Calling Conventions and the AAPCS64 ABI

  1. The AAPCS64 Specification Overview
  2. Register Allocation: Arguments, Temporaries, Preserved Registers
  3. Stack Frame Layout and Alignment Rules
  4. Parameter Passing: Integers, Floats, and Structs
  5. Variadic Functions and Varargs Support
  6. Interoperation with C, Rust, and Other Languages

Chapter 7: Exception Levels and Privilege Modes

  1. Four Exception Levels: EL0 through EL3
  2. Entering and Returning from Exceptions
  3. System Registers: Configuration and Control
  4. Interrupt Handling and Vector Tables
  5. Context Switching at the Assembly Level
  6. Secure vs Non-Secure World

Chapter 8: Memory Management and Cache Hierarchy

  1. Virtual Memory and Translation Regimes
  2. The MMU and Page Table Walks
  3. TLB Management and Maintenance
  4. Cache Hierarchy: L1, L2, L3, and Data Caches
  5. Cache Maintenance Instructions
  6. Memory Attributes and Access Permissions

Chapter 9: Synchronization and Concurrency

  1. Atomic Instructions: LDAXR, STLR, CAS Patterns
  2. Load-Acquire and Store-Release Semantics
  3. Memory Barriers: DMB, DSB, ISB
  4. Lock-Free Programming Patterns
  5. Spinlocks and Mutex Implementation

Chapter 10: Cryptographic Extensions and Advanced Features

  1. ARMv8 Cryptographic Instructions: AES, PMULL, SHA
  2. Polynomial Multiplication and GCM Mode
  3. SHA-256 Hardware Acceleration
  4. SVE: Scalable Vector Extension Overview
  5. SVE2: Matrix and Bitmanip Extensions
  6. Other Extensions: RDM, LSE, DP, MTE

Chapter 11: Performance Tuning and Optimization

  1. Pipeline Architecture and Instruction-Level Parallelism
  2. Out-of-Order Execution and Scoreboarding
  3. Branch Prediction Patterns and Misprediction Costs
  4. Cache-Friendly Code Layout and Data Access
  5. Profiling with perf and Hardware Counters
  6. Real-World Optimization Case Study

Chapter 12: Compiler Interactions and Inline Assembly

  1. How Compilers Generate AArch64 Code
  2. GCC Inline Assembly Syntax and Constraints
  3. Clang/LLVM Inline Assembly and Intrinsics
  4. Optimization Barriers and Volatile Semantics
  5. Reading Compiler Output with objdump and llvm-objdump
  6. When to Use Assembly vs Intrinsics vs Compiler Hints

Chapter 13: Debugging, Reverse Engineering, and Systems Programming

  1. Debugging with GDB, QEMU, and Hardware Debuggers
  2. Reverse Engineering AArch64 Binaries
  3. Common Obfuscation Patterns and Anti-Analysis Techniques
  4. Syscall Interface: The ARM64 System Call ABI
  5. Kernel Entry Points and Trap Handling
  6. Practical Systems Programming Examples

Conclusion: The Future of AArch64 and Beyond

  1. What You Have Learned: Key Takeaways
  2. ARMv9 and the Next Generation
  3. The Server Revolution Continues
  4. Where to Go From Here

References

Glossary of ARM-Specific Terms

Appendix A: AArch64 Instruction Categories Quick Reference

Appendix B: Linux ARM64 System Call Table (Selected)

Appendix C: Memory Barrier Semantics Quick Reference

Appendix D: AAPCS64 Register Roles Summary

  1. General-Purpose Registers
  2. FP/SIMD Registers
  3. Stack Rules
  4. Argument Passing Rules

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