Mastering STM32 - Second Edition
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Mastering STM32 - Second Edition

A step-by-step guide to the most complete ARM Cortex-M platform, using the official STM32Cube development environment

About the Book

This is the second edition of the most complete book about the STM32 family of 32‑bit Flash microcontrollers from ST Microelectronics based on the ARM® Cortex®‑M architecture. The book will guide you in a clear and practical way to this hardware platform and the official ST CubeHAL and STM32CubeIDE, showing its functionalities with a lot of examples and tutorials. The book assumes that you are totally new to this family of MCUs, and it will start showing how to setup the tool-chain to build your STM32 based applications.

The book is addressed both to professionals and to fans of this platform, like hobbyists and students. The book examples are based on nine Nucleo-64 boards from ST.

This second edition is composed by twenty-eight chapters, divided in about 900 pages. They cover:

  • Introduction to Cortex-M and STM32 microcontrollers.
  • How to setup the STM32CubeIDE tool-chain in Windows, Linux and Mac OSX.
  • How to use STM32CubeMX to generate application skeleton.
  • Introduction to the debugging of STM32 applications.
  • GPIO management.
  • NVIC controller.
  • UART peripheral.
  • DMA controller.
  • STM32 clock tree and its configuration.
  • Basic, general purpose and advanced STM32 timers.
  • ADC peripheral.
  • DAC controller.
  • I2C bus and protocol.
  • SPI bus.
  • CRC peripheral.
  • IWDG and WWDG timers.
  • RTC clock.
  • Power management.
  • The memory layout of an STM32 application and linker scripts.
  • Flash memory management and the role of the ART Accelerator.
  • The booting process in STM32 microcontrollers and how to write a custom bootloader.
  • FreeRTOS 10.x and the tickless low-power mode.
  • Advanced debugging techniques and how to use SEGGER tools to debug STM32 MCUs.
  • FatFs Middleware.
  • How to develop IoT applications with the W5500 Ethernet processor.
  • USB 2.0 protocol and the STM32 USB Device Framework.
  • How to design a custom board using an STM32 MCU.

The complete Table of Contents can be downloaded from here.

You can reach the author through the book website: http://www.carminenoviello.com/en/mastering-stm32/

The LeanPub platform works so that, once you buy the book, you receive all updates for free.

About the Author

Carmine Noviello
Carmine Noviello

Carmine is a hardware designer and firmware developer living in south of Italy, close to the wonderful Naples. He spends the most of his time as team leader and BU Director in Bit4id, an Italian company leader in authentication, digital signature and cryptography. As soon manages to find some free time, he likes to treat programming topics on his personal blog. 

As you can see, he does not like to talk about himself :-)

Website: http://www.carminenoviello.com

Table of Contents

  •  
    • Preface
      • Who Is This Book For?
      • How to Integrate This Book?
      • How Is the Book Organized?
      • Differences With the First Edition
      • About the Author
      • Errata and Suggestions
      • Book Support
      • How to Help the Author
      • Copyright Disclaimer
      • Credits
    • Acknowledgments to the First Edition
  • I Introduction
    • 1. Introduction to STM32 MCU Portfolio
      • 1.1 Introduction to ARM Based Processors
        • 1.1.1 Cortex and Cortex-M Based Processors
          • 1.1.1.1 Core Registers
          • 1.1.1.2 Memory Map
          • 1.1.1.3 Bit-Banding
          • 1.1.1.4 Thumb-2 and Memory Alignment
          • 1.1.1.5 Pipeline
          • 1.1.1.6 Interrupts and Exceptions Handling
          • 1.1.1.7 SysTimer
          • 1.1.1.8 Power Modes
          • 1.1.1.9 TrustZone™
          • 1.1.1.10 CMSIS
          • 1.1.1.11 Effective Implementation of Cortex-M Features in the STM32 Portfolio
      • 1.2 Introduction to STM32 Microcontrollers
        • 1.2.1 Advantages of the STM32 Portfolio….
        • 1.2.2 ….And Its Drawbacks
      • 1.3 A Quick Look at the STM32 Subfamilies
        • 1.3.1 F0
        • 1.3.2 F1
        • 1.3.3 F2
        • 1.3.4 F3
        • 1.3.5 F4
        • 1.3.6 F7
        • 1.3.7 H7
        • 1.3.8 L0
        • 1.3.9 L1
        • 1.3.10 L4
        • 1.3.11 L4+
        • 1.3.12 L5
        • 1.3.13 U5
        • 1.3.14 G0
        • 1.3.15 G4
        • 1.3.16 STM32WB
        • 1.3.17 STM32WL
        • 1.3.18 How to Select the Right MCU for You?
      • 1.4 The Nucleo Development Board
    • 2. Get In Touch With SM32CubeIDE
      • 2.1 Why Choose STM32CubeIDE as Tool-Chain for STM32
        • 2.1.1 Two Words About Eclipse…
        • 2.1.2 … and GCC
      • 2.2 Downloading and Installing the STM32CubeIDE
        • 2.2.1 Windows - Installing the Tool-Chain
        • 2.2.2 Linux - Installing the Tool-Chain
        • 2.2.3 Mac - Installing the Tool-Chain
      • 2.3 STM32CubeIDE overview
    • 3. Hello, Nucleo!
      • 3.1 Create a Project
      • 3.2 Adding Something Useful to the Generated Code
      • 3.3 Connecting the Nucleo to the PC
        • 3.3.1 ST-LINK Firmware Upgrade
      • 3.4 Flashing the Nucleo using STM32CubeProgrammer
    • 4. STM32CubeMX Tool
      • 4.1 Introduction to CubeMX Tool
        • 4.1.1 Target Selection Wizard
          • 4.1.1.1 MCU/MPU Selector
          • 4.1.1.2 Board Selector
          • 4.1.1.3 Example Selector
          • 4.1.1.4 Cross Selector
        • 4.1.2 MCU and Middleware Configuration
          • 4.1.2.1 Pinout View & Configuration
          • 4.1.2.2 Clock Configuration View
        • 4.1.3 Project Manager
        • 4.1.4 Tools View
      • 4.2 Understanding Project Structure
      • 4.3 Downloading Book Source Code Examples
      • 4.4 Management of STM32Cube Packages
    • 5. Introduction to Debugging
      • 5.1 What is Behind a Debug Session
      • 5.2 Debugging With STM32CubeIDE
        • 5.2.1 Debug Configurations
      • 5.3 I/O Retargeting
  • II Diving into the HAL
    • 6. GPIO Management
      • 6.1 STM32 Peripherals Mapping and HAL Handlers
      • 6.2 GPIOs Configuration
        • 6.2.1 GPIO Mode
        • 6.2.2 GPIO Alternate Function
      • 6.3 Driving a GPIO
      • 6.4 De-initialize a GPIO
    • 7. Interrupts Management
      • 7.1 NVIC Controller
        • 7.1.1 Vector Table in STM32
      • 7.2 Enabling Interrupts
        • 7.2.1 External Lines and NVIC
        • 7.2.2 Enabling Interrupts with CubeMX
      • 7.3 Interrupt Lifecycle
      • 7.4 Interrupt Priority Levels
        • 7.4.1 Cortex-M0/0+
        • 7.4.2 Cortex-M3/4/7/33
        • 7.4.3 Setting Interrupt Priority in CubeMX
      • 7.5 Interrupt Re-Entrancy
      • 7.6 Mask All Interrupts at Once or an a Priority Basis
    • 8. Universal Asynchronous Serial Communications
      • 8.1 Introduction to UARTs and USARTs
      • 8.2 UART Initialization
        • 8.2.1 UART Configuration Using CubeMX
      • 8.3 UART Communication in Polling Mode
        • 8.3.1 Installing a Terminal Emulator in Eclipse
      • 8.4 UART Communication in Interrupt Mode
        • 8.4.1 UART Related Interrupts
      • 8.5 Error Management
      • 8.6 List of Available Callbacks in the HAL_UART Module
    • 9. DMA Management
      • 9.1 Introduction to DMA
        • 9.1.1 The Need of a DMA and the Role of the Internal Buses
        • 9.1.2 The DMA Controller
          • 9.1.2.1 The DMA Implementation in F0/F1/F3/L0/L1/L4 MCUs
          • 9.1.2.2 The DMA Implementation in F2/F4/F7 MCUs
          • 9.1.2.3 The DMA Implementation in G0/G4/L4+/L5/H7 MCUs
      • 9.2 HAL_DMA Module
        • 9.2.1 DMA_HandleTypeDef in F0/F1/F3/L0/L1/L4 HALs
        • 9.2.2 DMA Configuration in G0/G4/L4+/L5/H7 HALs
        • 9.2.3 DMA_HandleTypeDef in F2/F4/F7 HALs
        • 9.2.4 How to Perform DMA Transfers in Polling Mode
        • 9.2.5 How to Perform DMA Transfers in Interrupt Mode
        • 9.2.6 Using the HAL_UART Module with DMA Mode Transfers
        • 9.2.7 Programming the DMAMUX With the CubeHAL
        • 9.2.8 Miscellaneous Functions From HAL_DMA and HAL_DMA_Ex Modules
      • 9.3 Using CubeMX to Configure DMA Requests
      • 9.4 Correct Memory Allocation of DMA Buffers
      • 9.5 A Case Study: The DMA Memory-To-Memory Transfer Performance Analysis
    • 10. Clock Tree
      • 10.1 Clock Distribution
        • 10.1.1 Overview of the STM32 Clock Tree
          • 10.1.1.1 The Multispeed Internal RC Oscillator in STM32L/U Families
        • 10.1.2 Configuring Clock Tree Using CubeMX
        • 10.1.3 Clock Source Options in Nucleo Boards
          • 10.1.3.1 Clock Source in Nucleo-64 rev. MB1136 (older ones with ST-LINK V2.1)
            • 10.1.3.1.1 OSC Clock Supply
            • 10.1.3.1.2 OSC 32kHz Clock Supply
          • 10.1.3.2 Clock Source in Nucleo-64 rev. MB1367 (newer ones with ST-LINK v3)
            • 10.1.3.2.1 OSC Clock Supply
            • 10.1.3.2.2 OSC 32kHz Clock Supply
      • 10.2 Overview of the HAL_RCC Module
        • 10.2.1 Compute the Clock Frequency at Run-Time
        • 10.2.2 Enabling the Master Clock Output
        • 10.2.3 Enabling the Clock Security System
      • 10.3 HSI Calibration
    • 11. Timers
      • 11.1 Introduction to Timers
        • 11.1.1 Timer Categories in an STM32 MCU
        • 11.1.2 Effective Availability of Timers in the STM32 Portfolio
      • 11.2 Basic Timers
        • 11.2.1 Using Timers in Interrupt Mode
          • 11.2.1.1 Time Base Generation in Advanced Timers
        • 11.2.2 Using Timers in Polling Mode
        • 11.2.3 Using Timers in DMA Mode
        • 11.2.4 Stopping a Timer
        • 11.2.5 Using CubeMX to Configure a Basic Timer
      • 11.3 General Purpose Timers
        • 11.3.1 Time Base Generator with External Clock Sources
          • 11.3.1.1 External Clock Mode 2
          • 11.3.1.2 External Clock Mode 1
          • 11.3.1.3 Using CubeMX to Configure the Source Clock of a General Purpose Timer
        • 11.3.2 Master/Slave Synchronization Modes
          • 11.3.2.1 Enable Trigger-Related Interrupts
          • 11.3.2.2 Using CubeMX to Configure the Master/Slave Synchronization
        • 11.3.3 Generate Timer-Related Events by Software
        • 11.3.4 Counting Modes
        • 11.3.5 Input Capture Mode
          • 11.3.5.1 Using CubeMX to Configure the Input Capture Mode
        • 11.3.6 Output Compare Mode
          • 11.3.6.1 Using CubeMX to Configure the Output Compare Mode
        • 11.3.7 Pulse-Width Generation
          • 11.3.7.1 Generating a Sinusoidal Wave Using PWM
          • 11.3.7.2 Using CubeMX to Configure the PWM Mode
        • 11.3.8 One Pulse Mode
          • 11.3.8.1 Using CubeMX to Configure the OPM Mode
        • 11.3.9 Encoder Mode
          • 11.3.9.1 Using CubeMX to Configure the Encoder Mode
        • 11.3.10 Other Features Available in General Purpose and Advanced Timers
          • 11.3.10.1 Hall Sensor Mode
          • 11.3.10.2 Combined Three-Phase PWM Mode and Other Motor-Control Related Features
          • 11.3.10.3 Break Input and Locking of Timer Registers
          • 11.3.10.4 Preloading of Auto-Reload Register
        • 11.3.11 Debugging and Timers
      • 11.4 SysTick Timer
        • 11.4.1 Use Another Timer as System Timebase Source
      • 11.5 A Case Study: How to Precisely Measure Microseconds with STM32 MCUs
    • 12. Analog-To-Digital Conversion
      • 12.1 Introduction to SAR ADC
      • 12.2 HAL_ADC Module
        • 12.2.1 Conversion Modes
          • 12.2.1.1 Single-Channel, Single Conversion Mode
          • 12.2.1.2 Scan Single Conversion Mode
          • 12.2.1.3 Single-Channel, Continuous Conversion Mode
          • 12.2.1.4 Scan Continuous Conversion Mode
          • 12.2.1.5 Injected Conversion Mode
          • 12.2.1.6 Dual Modes
        • 12.2.2 Channel Selection
        • 12.2.3 ADC Resolution and Conversion Speed
        • 12.2.4 A/D Conversions in Polling Mode
        • 12.2.5 A/D Conversions in Interrupt Mode
        • 12.2.6 A/D Conversions in DMA Mode
          • 12.2.6.1 Convert Multiple Times the Same Channel in DMA Mode
          • 12.2.6.2 Multiple and not Continuous Conversions in DMA Mode
          • 12.2.6.3 Continuous Conversions in DMA Mode
        • 12.2.7 Errors Management
        • 12.2.8 Timer-Driven Conversions
        • 12.2.9 Conversions Driven by External Events
        • 12.2.10 ADC Calibration
      • 12.3 Using CubeMX to Configure ADC Peripheral
    • 13. Digital-To-Analog Conversion
      • 13.1 Introduction to the DAC Peripheral
      • 13.2 HAL_DAC Module
        • 13.2.1 Driving the DAC Manually
        • 13.2.2 Driving the DAC in DMA Mode Using a Timer
        • 13.2.3 Triangular Wave Generation
        • 13.2.4 Noise Wave Generation
    • 14. I²C
      • 14.1 Introduction to the I²C specification
        • 14.1.1 The I²C Protocol
          • 14.1.1.1 START and STOP Condition
          • 14.1.1.2 Byte Format
          • 14.1.1.3 Address Frame
          • 14.1.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
          • 14.1.1.5 Data Frames
          • 14.1.1.6 Combined Transactions
          • 14.1.1.7 Clock Stretching
        • 14.1.2 Availability of I²C Peripherals in STM32 MCUs
      • 14.2 HAL_I2C Module
        • 14.2.1 Using the I²C Peripheral in Master Mode
          • 14.2.1.1 I/O MEM Operations
          • 14.2.1.2 Combined Transactions
          • 14.2.1.3 A Note About the Clock Configuration in STM32F0/L0/L4 families
        • 14.2.2 Using the I²C Peripheral in Slave Mode
      • 14.3 Using CubeMX to Configure the I²C Peripheral
    • 15. SPI
      • 15.1 Introduction to the SPI Specification
        • 15.1.1 Clock Polarity and Phase
        • 15.1.2 Slave Select Signal Management
        • 15.1.3 SPI TI Mode
        • 15.1.4 Availability of SPI Peripherals in STM32 MCUs
      • 15.2 HAL_SPI Module
        • 15.2.1 Exchanging Messages Using SPI Peripheral
        • 15.2.2 Maximum Transmission Frequency Reachable using the CubeHAL
      • 15.3 Using CubeMX to Configure SPI Peripheral
    • 16. Cyclic Redundancy Check
      • 16.1 Introduction to CRC Computing
        • 16.1.1 CRC Calculation in STM32F1/F2/F4/L1 MCUs
        • 16.1.2 CRC Peripheral in STM32F0/F3/F7/L0/L4/L5/G0/G4 MCUs
      • 16.2 HAL_CRC Module
    • 17. IWDG and WWDG Timers
      • 17.1 The Independent Watchdog Timer
        • 17.1.1 Using the CubeHAL to Program IWDG Timer
      • 17.2 The System Window Watchdog Timer
        • 17.2.1 Using the CubeHAL to Program WWDG Timer
      • 17.3 Detecting a System Reset Caused by a Watchdog Timer
      • 17.4 Freezing Watchdog Timers During a Debug Session
      • 17.5 Selecting the Right Watchdog Timer for Your Application
    • 18. Real-Time Clock
      • 18.1 Introduction to the RTC Peripheral
      • 18.2 HAL_RTC Module
        • 18.2.1 Setting and Retrieving the Current Date/Time
          • 18.2.1.1 Correct Way to Read Date/Time Values
        • 18.2.2 Configuring Alarms
        • 18.2.3 Periodic Wakeup Unit
        • 18.2.4 Timestamp Generation and Tamper Detection
        • 18.2.5 RTC Calibration
          • 18.2.5.1 RTC Coarse Calibration
          • 18.2.5.2 RTC Smooth Calibration
          • 18.2.5.3 Reference Clock Detection
      • 18.3 Using the Backup SRAM
  • III Advanced topics
    • 19. Power Management
      • 19.1 Power Management in Cortex-M Based MCUs
      • 19.2 How Cortex-M MCUs Handle Run and Sleep Modes
        • 19.2.1 Entering/exiting sleep modes
          • 19.2.1.1 Sleep-On-Exit
        • 19.2.2 Sleep Modes in Cortex-M Based MCUs
      • 19.3 Power Management in STM32F Microcontrollers
        • 19.3.1 Power Sources
        • 19.3.2 Power Modes
          • 19.3.2.1 Run Mode
            • 19.3.2.1.1 Dynamic Voltage Scaling in STM32F4/F7 MCUs
            • 19.3.2.1.2 Over/Under-Drive Mode in STM32F4/F7 MCUs
          • 19.3.2.2 Sleep Mode
          • 19.3.2.3 Stop Mode
          • 19.3.2.4 Standby Mode
          • 19.3.2.5 Low-Power Modes Example
        • 19.3.3 An Important Warning for STM32F1 Microcontrollers
      • 19.4 Power Management in STM32L/G Microcontrollers
        • 19.4.1 Power Sources
        • 19.4.2 Power Modes
          • 19.4.2.1 Run Modes
          • 19.4.2.2 Sleep Modes
            • 19.4.2.2.1 Batch Acquisition Mode
          • 19.4.2.3 Stop Modes
          • 19.4.2.4 Standby Modes
          • 19.4.2.5 Shutdown Mode
        • 19.4.3 Power Modes Transitions
        • 19.4.4 Low-Power Peripherals
          • 19.4.4.1 LPUART
          • 19.4.4.2 LPTIM
          • 19.4.4.3 LPGPIO
          • 19.4.4.4 LPDMA
      • 19.5 Power Supply Supervisors
      • 19.6 Debugging in Low-Power Modes
      • 19.7 Using the CubeMX Power Consumption Calculator
      • 19.8 A Case Study: Using Watchdog Timers With Low-Power Modes
    • 20. Memory layout
      • 20.1 The STM32 Memory Layout Model
        • 20.1.1 Flash Memory Typical Organization
        • 20.1.2 SRAM Memory Typical Organization
        • 20.1.3 Understanding Compilation and Linking Processes
      • 20.2 The Really Minimal STM32 Application
        • 20.2.1 ELF Binary File Inspection
        • 20.2.2 .data and .bss Sections Initialization
          • 20.2.2.1 A Word About the COMMON Section
        • 20.2.3 .rodata Section
        • 20.2.4 Stack and Heap Regions
        • 20.2.5 Checking the Size of Heap and Stack at Compile-Time
        • 20.2.6 Differences With the Tool-Chain Script Files
      • 20.3 How to Use the CCM Memory
        • 20.3.1 Relocating the vector table in CCM Memory
      • 20.4 How to Use the MPU in Cortex-M0+/3/4/7 Based STM32 MCUs
        • 20.4.1 Programming the MPU With the CubeHAL
    • 21. Flash Memory Management
      • 21.1 Introduction to STM32 Flash Memory
      • 21.2 The HAL_FLASH Module
        • 21.2.1 Flash Memory Unlocking
        • 21.2.2 Flash Memory Erasing
        • 21.2.3 Flash Memory Programming
        • 21.2.4 Flash Read Access During Programming and Erasing
      • 21.3 Option Bytes
        • 21.3.1 Flash Memory Read Protection
      • 21.4 Optional OTP and True-EEPROM Memories
      • 21.5 Flash Read Latency and the ART™ Accelerator
        • 21.5.1 The Role of the TCM Memories in STM32F7/H7 MCUs
          • 21.5.1.1 How to Access Flash Memory Through the TCM Interface
          • 21.5.1.2 Using CubeMX to Configure Flash Memory Interface
    • 22. Booting Process
      • 22.1 The Cortex-M Unified Memory Layout and the Booting Process
        • 22.1.1 Software Physical Remap
        • 22.1.2 Vector Table Relocation
        • 22.1.3 Running the Firmware From SRAM Using the STM32CubeIDE
      • 22.2 Integrated STM32 Bootloader
        • 22.2.1 Starting the STM32 Bootloader from the On-Board Firmware
        • 22.2.2 The Booting Sequence in the STM32CubeIDE Tool-chain
      • 22.3 Developing a Custom Bootloader
        • 22.3.1 Vector Table Relocation in STM32F0 Microcontrollers
        • 22.3.2 How to Use the flasher.py Tool
    • 23. Running FreeRTOS
      • 23.1 Understanding the Concepts Underlying an RTOS
      • 23.2 Configuring FreeRTOS and the CMSIS-RTOS v2 Wrapper
        • 23.2.1 The FreeRTOS Source Tree
          • 23.2.1.1 How to Configure FreeRTOS Using CubeMX
      • 23.3 Thread Management
        • 23.3.1 Thread States
        • 23.3.2 Thread Priorities and Scheduling Policies
        • 23.3.3 Voluntary Release of the Control
        • 23.3.4 The idle Thread
      • 23.4 Memory Allocation and Management
        • 23.4.1 Dynamic Memory Allocation Model
          • 23.4.1.1 heap_1.c
          • 23.4.1.2 heap_2.c
          • 23.4.1.3 heap_3.c
          • 23.4.1.4 heap_4.c
          • 23.4.1.5 heap_5.c
          • 23.4.1.6 FreeRTOS Heap Definition
        • 23.4.2 Static Memory Allocation Model
          • 23.4.2.1 idle Thread Allocation with Static Memory Allocation Model
        • 23.4.3 FreeRTOS and the C stdlib
          • 23.4.3.1 How to Configure newlib to Handle Concurrency with FreeRTOS
          • 23.4.3.2 How to Use malloc() and malloc()-dependant newlib Functions With FreeRTOS
          • 23.4.3.3 STM32CubeMX Approach to Thread-Safety
        • 23.4.4 Memory Pools
        • 23.4.5 Stack Overflow Detection
      • 23.5 Synchronization Primitives
        • 23.5.1 Message Queues
        • 23.5.2 Semaphores
        • 23.5.3 Event and Thread Flags
      • 23.6 Resources Management and Mutual Exclusion
        • 23.6.1 Mutexes
          • 23.6.1.1 The Priority Inversion Problem
          • 23.6.1.2 Recursive Mutexes
        • 23.6.2 Critical Sections
        • 23.6.3 Interrupt Management With an RTOS
          • 23.6.3.1 FreeRTOS API and Interrupt Priorities
      • 23.7 Software Timers
        • 23.7.1 How FreeRTOS Manages Timers
      • 23.8 A Case Study: Low-Power Management With an RTOS
        • 23.8.1 The idle Thread Hook
        • 23.8.2 The Tickless Mode in FreeRTOS
          • 23.8.2.1 A Schema for the tickless Mode
          • 23.8.2.2 A Custom tickless Mode Policy
      • 23.9 Debugging Features
        • 23.9.1 configASSERT() Macro
        • 23.9.2 Run-Time Statistics and Thread State Information
        • 23.9.3 FreeRTOS Debugging in STM32CubeIDE
        • 23.9.4 FreeRTOS Kernel-Aware Debugging in STM32CubeIDE
      • 23.10 Alternatives to FreeRTOS
        • 23.10.1 AzureRTOS
        • 23.10.2 ChibiOS
        • 23.10.3 Contiki OS
        • 23.10.4 OpenRTOS
    • 24. Advanced Debugging Techniques
      • 24.1 Understanding Cortex-M Fault-Related Exceptions
        • 24.1.1 The Cortex-M Exception Entrance Sequence and the ARM Calling Convention
          • 24.1.1.1 How to Interpret the Content of the LR Register on Exception Entrance
        • 24.1.2 Fault Exceptions and Faults Analysis
          • 24.1.2.1 Memory Management Exception
          • 24.1.2.2 Bus Fault Exception
          • 24.1.2.3 Usage Fault Exception
          • 24.1.2.4 Hard Fault Exception
          • 24.1.2.5 Secure Fault Exception
          • 24.1.2.6 Enabling Optional Fault Handlers
          • 24.1.2.7 Fault Analysis in Cortex-M0/0+ Based Processors
      • 24.2 STM32CubeIDE Advanced Debugging Features
        • 24.2.1 Expressions and Live Expressions
          • 24.2.1.1 Memory Monitors
        • 24.2.2 Watchpoints
        • 24.2.3 Instruction Stepping Mode
        • 24.2.4 SFRs View
        • 24.2.5 Fault Analyzer
          • 24.2.5.1 Tracing Fault-Related Registers Without the IDE Support
        • 24.2.6 Build Analyzer
        • 24.2.7 Static Stack Analyzer
      • 24.3 Serial Wire Viewer Tracing
        • 24.3.1 Enabling SWV Debugging
        • 24.3.2 Configuring SWV
        • 24.3.3 SWV Views
          • 24.3.3.1 SWV Trace Log
          • 24.3.3.2 SWV Exception Trace Log
          • 24.3.3.3 SWV Data Trace
          • 24.3.3.4 SWV Data Trace Timeline Graph
          • 24.3.3.5 SWV ITM Data Console
          • 24.3.3.6 SWV Statistical Profiling
      • 24.4 Debugging Aids from the CubeHAL
      • 24.5 External Debuggers
      • 24.6 Debugging two Nucleo Boards Simultaneously
      • 24.7 ARM Semihosting
        • 24.7.1 Enable Semihosting on a Project
        • 24.7.2 Semihosting Drawbacks
        • 24.7.3 Understanding How Semihosting Works
    • 25. FAT Filesystem
      • 25.1 Introduction to FatFs Library
        • 25.1.1 Adding FatFs Library in Your Projects
          • 25.1.1.1 The Generic Disk Interface API
          • 25.1.1.2 The Implementation of a Driver to Access SD Cards in SPI Mode
        • 25.1.2 Relevant FatFs Structures and Functions
          • 25.1.2.1 Mounting a Filesystem
          • 25.1.2.2 Opening a File
          • 25.1.2.3 Reading From/Writing into a File
          • 25.1.2.4 Creating and Opening a Directory
        • 25.1.3 How to Configure the FatFs Library
    • 26. Develop IoT Applications
      • 26.1 Solutions Offered by STM to Develop IoT Applications
      • 26.2 The W5500 Ethernet Controller
        • 26.2.1 How to Use the W5500 Shield and the ioLibrary_Driver Module
          • 26.2.1.1 Configuring the SPI Interface
          • 26.2.1.2 Configuring the Socket Buffers and the Network Interface
        • 26.2.2 Socket APIs
          • 26.2.2.1 Handling Sockets in TCP Mode
          • 26.2.2.2 Handling Sockets in UDP Mode
        • 26.2.3 I/O Retargeting to a TCP/IP Socket
        • 26.2.4 Building up an HTTP Server
          • 26.2.4.1 A Web-Based Oscilloscope
    • 27. Universal Serial Bus
      • 27.1 USB 2.0 Specification Overview
        • 27.1.1 The “Before-To-Die” Guide to USB
        • 27.1.2 USB Physical Architecture Overview
        • 27.1.3 USB Logical Architecture Overview
          • 27.1.3.1 Device States
          • 27.1.3.2 Communication Endpoints
        • 27.1.4 USB 2.0 Communication Protocol Overview
          • 27.1.4.1 Packet Types
          • 27.1.4.2 Transaction Types
            • 27.1.4.2.1 Control Transactions
            • 27.1.4.2.2 IN/OUT Transactions
          • 27.1.4.3 Device and Interface Descriptors
            • 27.1.4.3.1 Device Descriptors
            • 27.1.4.3.2 Configuration Descriptors
            • 27.1.4.3.3 Interface Descriptors
            • 27.1.4.3.4 Endpoint Descriptors
            • 27.1.4.3.5 String Descriptors
          • 27.1.4.4 USB Classes
      • 27.2 STM32 USB Device Library
        • 27.2.1 Understanding Generated Code
        • 27.2.2 USB Initialization Sequence
        • 27.2.3 USB Enumeration Sequence
        • 27.2.4 The USB CDC Class
          • 27.2.4.1 USB CDC Descriptors
          • 27.2.4.2 USB CDC Class Initialization
          • 27.2.4.3 USB CDC Class Operations
      • 27.3 Building Custom USB Devices
        • 27.3.1 The USB HID Class
          • 27.3.1.1 USB HID Descriptors
          • 27.3.1.2 Overview of the Report Descriptor
          • 27.3.1.3 USB HID Class-Specific Requests
        • 27.3.2 Building a Vendor-Specific USB HID Device
      • 27.4 Debugging USB Devices
        • 27.4.1 Software Sniffers and Analyzers
        • 27.4.2 USB Hardware Analyzers
      • 27.5 Optimizing the STM32 USB Device Library
      • 27.6 Going to the Market
    • 28. Getting Started with a New Design
      • 28.1 Hardware Design
        • 28.1.1 PCB Layer Stack-Up
        • 28.1.2 MCU Package
        • 28.1.3 Decoupling of Power-Supply Pins
        • 28.1.4 Clocks
        • 28.1.5 Filtering of RESET Pin
        • 28.1.6 Debug Port
        • 28.1.7 Boot Mode
        • 28.1.8 Pay attention to “pin-to-pin” Compatibility…
        • 28.1.9 …And to Selecting the Right Peripherals
        • 28.1.10 The Role of CubeMX During the Board Design Stage
        • 28.1.11 Board Layout Strategies
      • 28.2 Software Design
        • 28.2.1 Generating the binary image for production
  • Appendix
    • A. Miscellaneous HAL functions and STM32 features
      • Force MCU reset from the firmware
      • STM32 96-bit Unique CPU ID
    • B. Troubleshooting Guide
      • STM32CubeIDE Issues
        • Debugging Continuously Breaks at Every Instruction During a Debug Session
        • The Step-by-Step Debugging is Really Slow
        • The Firmware Works Only Under a Debug Session
      • STM32 Related Issues
        • The Microcontroller Does Not Boot Correctly
        • It is Not Possible to Flash or to Debug the MCU
    • C. Nucleo pin-out
      • Nucleo-G474RE
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-F446RE
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-F401RE
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-F303RE
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-F103RB
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-F072RB
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-L476RG
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-L152RE
        • Arduino compatible headers
        • Morpho headers
      • Nucleo-L073R8
        • Arduino compatible headers
        • Morpho headers
    • D. Differences with the 1st edition
      • Chapter 1
      • Chapter 2
      • Chapter 3 and 4
      • Chapter 5
      • Chapter 6
      • Chapter 7
      • Chapter 8
      • Chapter 9
      • Chapter 10
      • Chapter 11
      • Chapter 12-22
      • Chapter 23
      • Chapter 24
      • Chapter 25-26
      • Chapter 27
      • Chapter 28
  • Notes

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